Field of the Invention
The invention relates in general to a method for manufacturing of a semiconductor device, and more particularly to a method for manufacturing of a titanium self-aligned silicide (Salicide). A special thermal treatment is used in the invention in order to make the phase-transformation more complete and to prevent the agglomeration phenomenon.
As the level of integration for MOS devices increases, resistance in the source/drain terminals of the MOS device gradually rises to a value comparable to the channel resistance of the MOS device. To ensure integrity at the shallow junction between metallic contacts and the MOS terminals, and for the downward adjustment of sheet resistance in the source/drain terminals, self-aligned silicide processes are now employed in the manufacturing of ultra large scale integrated (ULSI) circuits with a line width less than 0.5 .mu.m. Because of the low resistance of the titanium silicide, the ohmic contact formed at the interface between titanium silicide and silicon will be excellent.
FIGS. 1A to 1C are cross-sectional views showing a conventional process for making the self-aligned silicide.
First, as shown in FIG. 1A, a semiconductor substrate 10 is provided, and shallow trench isolation regions 12 and MOS transistors 10' are formed above the substrate 10.
The MOS transistors 10' consist of gate electrodes 18, spacers 16 formed around the periphery of the gate electrodes 18 and source/drain regions 14 formed near the surface of the substrate 10 and around the periphery of the gate electrodes 18. The spacers 16 can be made from a material such as dielectric compound.
Next, in FIG. 1B, a layer of titanium metal 28 is deposited, for example, using a magnetically controlled DC sputtering method, over the surface of the semiconductor substrate 10 to a thickness of about 200-1000 .ANG..
Next, in FIG. 1C, a layer of titanium silicide is formed at the interface between the titanium and silicon. Namely, a layer of titanium silicide 28a is formed on the surface of the source/drain regions 14 to reduce the sheet resistance of the source/drain regions 14.
Meanwhile, a titanium silicide layer 28b is formed by using a rapid thermal process (RTP) which has two stages.
The FIG. 2 is a plot of temperature vs. time during the silicide phase transform period in the conventional process
Referring the FIG. 2, the early titanium silicide is formed by using a rapid thermal anneal (RTA) with nitrogen gases at a temperature of about 600-650.degree. C. in the first stage 30. The early titanium silicide has the C49 phase. Then, the unreacted titanium metal and the titanium nitride formed by the reaction between the titanium metal and nitrogen gases are removed, for example, by using a RCA cleaning solution. The RCA cleaning solution consists of NH.sub.4 OH/HDIW (Hot De-ionization Water)/H.sub.2 O.sub.2. The temperature is raised to about 800-900.degree. C. and the RTA process is performed with nitrogen gases to transform the phase of the titanium silicide from C49 to C54 in the second stage 32. Then the surrounding temperature is decreased in the step 34.
The RTP process with two stages is used in the conventional process. It utilizes the longer time to transform the phase of the titanium silicide. Therefore, as the size of the device diminishes, the energy that the transformation needs is increases and a higher temperature is needed. However, the transformation of the phase is still incomplete. Therefore, the titanium silicide formed doesn't have a low resistance, and, the ohmic contact formed at the interface between the titanium silicide and the silicon will not be excellent. Moreover, the higher temperature and the longer time instigate the agglomeration phenomenon.